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Add more execution time != 1 tests for ListScheduler and fix port-constraint bugs

Merged Simon Bjurek requested to merge add-exec-time-not-one-tests-etc into master
3 unresolved threads
  • Add more execution time != 1 tests for ListScheduler.
  • Fix port-constraint bugs.
  • Add ILP-based split_on_execution_time method.
  • Add ILP-based assign method for memories.

Closes: #356 (closed) #354 (closed)

Edited by Simon Bjurek

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411 411 log.debug("Scheduler initializing")
412 412 self._initialize_scheduler(schedule)
413 413
414 if self._sfg.loops and self._schedule.cyclic:
414 if self._schedule.cyclic and self._sfg.loops:
  • Simon Bjurek added 1 commit

    added 1 commit

    • 5c634d6b - Add more execution time != 1 tests for ListScheduler and fix port-constraint bugs

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  • 1891 memories.append(memory)
    1892 memory.assign("graph_color")
    1893
    1894 arch = Architecture(
    1895 processing_elements,
    1896 memories,
    1897 direct_interconnects=direct,
    1898 )
    1899 assert len(arch.processing_elements) == 4
    1900 assert len(arch.memories) == 2
    1901
    1902 def test_execution_time_not_one_and_latency_offsets_port_constrained(self):
    1903 sfg = radix_2_dif_fft(points=16)
    1904
    1905 sfg.set_latency_offsets_of_type(
    1906 Butterfly, {"in0": 0, "in1": 1, "out0": 1, "out1": 2}
    • Suggested change
      1906 Butterfly, {"in0": 0, "in1": 1, "out0": 1, "out1": 2}
      1906 Butterfly, {"in0": 0, "in1": 1, "out0": 2, "out1": 3}

      and execution time of 2 will actually lead to a realistic case. (Single input port butterfly, computing addition and subtraction sequentially.)

      (This also opens the question how to model that inputs and outputs share the same PE port...)

    • Simon Bjurek changed this line in version 5 of the diff

      changed this line in version 5 of the diff

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  • 821 825
    822 826 def _update_port_reads(self, next_op: "Operation") -> None:
    823 827 for input_port in next_op.inputs:
    824 source_op = input_port.signals[0].source.operation
    828 source_port = input_port.signals[0].source
    829 source_op = source_port.operation
    830 time = self._current_time + input_port.latency_offset
    825 831 if (
    826 832 not isinstance(source_op, DontCare)
    827 833 and not isinstance(source_op, Delay)
  • Simon Bjurek added 1 commit

    added 1 commit

    • 3cbca1ae - Add ILP split_on_execution_time method

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  • Simon Bjurek added 1 commit

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    • b9c02868 - Add ILP split_on_execution_time method

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  • Simon Bjurek added 2 commits

    added 2 commits

    • f876d1ad - Add more execution time != 1 tests for ListScheduler and fix port-constraint bugs
    • af76e3c4 - Add ILP split_on_execution_time method

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  • Simon Bjurek marked this merge request as ready

    marked this merge request as ready

  • Simon Bjurek changed the description

    changed the description

  • Oscar Gustafsson approved this merge request

    approved this merge request

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