Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
B-ASIC - Better ASIC Toolbox
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Iterations
Requirements
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Locked files
Build
Pipelines
Jobs
Pipeline schedules
Test cases
Artifacts
Deploy
Releases
Package registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Code review analytics
Issue analytics
Insights
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Terms and privacy
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Computer Engineering
B-ASIC - Better ASIC Toolbox
Merge requests
Open
8
Merged
552
Closed
24
All
584
Merge trains
Actions
Subscribe to RSS feed
Toggle search history
Recent searches
You don't have any recent searches
Created date
Priority
Created date
Updated date
Closed date
Milestone due date
Popularity
Label priority
Title
Draft: Remove unneccecary generics for VHDL codegen and fix bugs for tb generation
!584
·
created
53 minutes ago
by
Simon Bjurek
Code generation
0 of 1 Approvals
updated 52 minutes ago
Add is_commutative and is_distributive
!457
·
created
1 year ago
by
Robier Al Kaadi
0 of 1 Approvals
updated 1 month ago
Update signal_flow_graph.SFG.find_by_type_name. Now it actually checks the...
!443
·
created
1 year ago
by
Petter Källström
Approved
updated 4 months ago
Draft: Add more WDF adaptors
!428
·
created
1 year ago
by
Oscar Gustafsson
Completeness
Operations
0 of 1 Approvals
updated 1 year ago
Draft: Added support for plotting result from many simulations. Solves #209
!312
·
created
2 years ago
by
Petter Källström
0 of 1 Approvals
updated 3 months ago
Start caching dependencies
!249
·
created
2 years ago
by
Oscar Gustafsson
0 of 1 Approvals
updated 2 years ago
WIP: codegen: add B-ASIC commit hash in VHDL preamble
!246
·
created
2 years ago
by
Mikael Henriksson
0 of 1 Approvals
updated 2 years ago
Initial work on constant propagation
!137
·
created
2 years ago
by
Oscar Gustafsson
Enhancement
Operations
Signal flow graph
0 of 1 Approvals
updated 2 years ago
