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d26efc94

Commit d26efc94 authored 1 year ago by Mikael Henriksson

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add support for testing valid VHDL identifiers (closes #246)

parent bae4acaf

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Pipeline #96949 passed 1 year ago

Stage: test

Changes 5
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b_asic/architecture.py 4 additions, 5 deletions

b_asic/architecture.py
b_asic/codegen/vhdl/common.py 165 additions, 2 deletions

b_asic/codegen/vhdl/common.py
b_asic/resources.py 17 additions, 8 deletions

b_asic/resources.py
examples/secondorderdirectformiir_architecture.py 2 additions, 2 deletions

examples/secondorderdirectformiir_architecture.py
test/test_codegen.py 36 additions, 0 deletions

test/test_codegen.py

with 224 additions and 17 deletions

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