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Computer Engineering
B-ASIC - Better ASIC Toolbox
Commits
0066c721
Commit
0066c721
authored
2 years ago
by
Oscar Gustafsson
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Add test for memory variable list
parent
5620f851
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!97
Add test for memory variable list
Pipeline
#88002
passed
2 years ago
Stage: test
Changes
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4 changed files
test/conftest.py
+1
-0
1 addition, 0 deletions
test/conftest.py
test/fixtures/schedule.py
+17
-0
17 additions, 0 deletions
test/fixtures/schedule.py
test/test_schedule.py
+31
-0
31 additions, 0 deletions
test/test_schedule.py
test/test_scheduler_gui.py
+1
-0
1 addition, 0 deletions
test/test_scheduler_gui.py
with
50 additions
and
0 deletions
test/conftest.py
+
1
−
0
View file @
0066c721
from
test.fixtures.operation_tree
import
*
from
test.fixtures.port
import
*
from
test.fixtures.schedule
import
*
from
test.fixtures.signal
import
signal
,
signals
from
test.fixtures.signal_flow_graph
import
*
...
...
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test/fixtures/schedule.py
0 → 100644
+
17
−
0
View file @
0066c721
import
pytest
from
test.fixtures.signal_flow_graph
import
precedence_sfg_delays
from
b_asic.core_operations
import
Addition
,
ConstantMultiplication
from
b_asic.schedule
import
Schedule
@pytest.fixture
def
secondorder_iir_schedule
(
precedence_sfg_delays
):
precedence_sfg_delays
.
set_latency_of_type
(
Addition
.
type_name
(),
4
)
precedence_sfg_delays
.
set_latency_of_type
(
ConstantMultiplication
.
type_name
(),
3
)
schedule
=
Schedule
(
precedence_sfg_delays
,
scheduling_alg
=
"
ASAP
"
)
return
schedule
This diff is collapsed.
Click to expand it.
test/test_schedule.py
+
31
−
0
View file @
0066c721
...
...
@@ -58,6 +58,31 @@ class TestInit:
}
assert
schedule
.
schedule_time
==
21
def
test_complicated_single_outputs_normal_latency_from_fixture
(
self
,
secondorder_iir_schedule
):
start_times_names
=
{
secondorder_iir_schedule
.
sfg
.
find_by_id
(
op_id
).
name
:
start_time
for
op_id
,
start_time
in
secondorder_iir_schedule
.
_start_times
.
items
()
}
assert
start_times_names
==
{
"
IN1
"
:
0
,
"
C0
"
:
0
,
"
B1
"
:
0
,
"
B2
"
:
0
,
"
ADD2
"
:
3
,
"
ADD1
"
:
7
,
"
Q1
"
:
11
,
"
A0
"
:
14
,
"
A1
"
:
0
,
"
A2
"
:
0
,
"
ADD3
"
:
3
,
"
ADD4
"
:
17
,
"
OUT1
"
:
21
,
}
assert
secondorder_iir_schedule
.
schedule_time
==
21
def
test_complicated_single_outputs_complex_latencies
(
self
,
precedence_sfg_delays
):
...
...
@@ -436,3 +461,9 @@ class TestTimeResolution:
assert
2
*
old_schedule_time
==
schedule
.
schedule_time
assert
schedule
.
get_possible_time_resolution_decrements
()
==
[
1
,
2
]
class
TestProcesses
:
def
test__get_memory_variables_list
(
self
,
secondorder_iir_schedule
):
mvl
=
secondorder_iir_schedule
.
_get_memory_variables_list
()
assert
len
(
mvl
)
==
12
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test/test_scheduler_gui.py
+
1
−
0
View file @
0066c721
...
...
@@ -2,6 +2,7 @@ import pytest
from
b_asic.core_operations
import
Addition
,
ConstantMultiplication
from
b_asic.schedule
import
Schedule
try
:
import
b_asic.scheduler_gui
as
GUI
except
ImportError
:
...
...
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