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Commit e31dbf99 authored by Bengt's avatar Bengt
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Cleaning up more

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ArduinoZeroTemplate.h deleted 100644 → 0
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/*
* ArduinoZeroTemplate.h
*
* Created: 2020-12-09 09:57:03
* Author: ilosz01
*/
#ifndef ARDUINOZEROTEMPLATE_H_
#define ARDUINOZEROTEMPLATE_H_
/* Pin mapping
Hardware:
Crystal:
PA00
PA01
USB:
PA18
PA24
PA25
Micro SD:
PA12
PA13
PA14
PA15
PA27
LED:
PB08
VBatt:
PB09
I2C: To SM05B
PA08 - SERCOM2/Pad[0]/I2C_SDA. Has pull-up "DNP"
PA09 - SERCOM2/Pad[1]/I2C_SCL. Has pull-up "DNP"
PA21
Crypto:
PA08 (I2C)
PA09 (I2C)
Not connected:
PA28
Debug:
PA30 - SWCK
PA31 - SWDIO
Pin 40 - Reset
Available for user
DAC0:
(J4-2) PA02 - Vout
(J4-1) PA03 - VrefA
USART 0: Free
(J4-5) PA04 - SERCOM0/Pad[0] - AIN4 - Reserved for RTX (out)
(J4-6) PA05 - SERCOM0/Pad[1] - AIN5 - Reserved for CTS (in)
(J4-7) PA06 - SERCOM0/Pad[2] - AIN6 - TX (out)
(J4-8) PA07 - SERCOM0/Pad[3] - AIN7 - RX (in)
USART 1: Prefer to used for SPI to external components
(J5-3) PA16 - SERCOM1/Pad[0] - MOSI
(J5-4 PA17 - SERCOM1/Pad[1] - SCK
PA18 - USB
(J5-5) PA19 - SERCOM1/Pad[3] - MISO
// SPI pad combination is SPI_SIGNAL_MUX_SETTING_D
USART 2: Free
(J5-6) PA08 - SERCOM2/Pad[0] - I2C_SDA (J7), pull-up "DNP"
(J5-7) PA09 - SERCOM2/Pad[1] - I2C_SCL (J7), pull-up "DNP"
(J4-11) PA10 - SERCOM2/Pad[2]
(J4-12) PA11 - SERCOM2/Pad[3]
USART 3: Used for USB to play with the USB to PC
// If used for USB: (PA24 and PA254 is in this case free)
(J4-9) PA22 - SERCOM3/Pad[0]
(J4-10) PA23 - SERCOM3/Pad[1]
PA24 - SERCOM3/Pad[2] - USB. Only ESD-protected
PA25 - SERCOM3/Pad[3] - USB. Only ESD-protected
// If used for UART:
(J4-9) PA22 - SERCOM5/Pad[0] - Reserved for RTX (out)
(J4-10) PA23 - SERCOM5/Pad[1] - Reserved for CTS (in)
(J5-9) PB22 - SERCOM5/Pad[2] - TX (out)
(J5-8) PB23 - SERCOM5/Pad[3] - RX (in)
SERCOM4 can not be used on Arduino Zero.
SERCOM5 can not be used on Arduino Zero.
Free:
(J4-3) PB02 - AIN10
(J4-4) PB03 - AIN11
(J5-1) PA20 - TCC0-W6
(J5-2) PA21 - TCC0-W7
(J4-13) PB10 - TCC0-W4
(J4-14) PB11 - TCC0-W5
*/
// Macros for writing to I/O:
// Note: Only Data Output Value, Data Input Value and Pin Direction registers can be accessed through IOBUS operation.
// putting port to a variable in advance is faster than reading from array
// PORT_IOBUS is faster that PORT. Especially if compiler optimizations are enabled.
// Read more here about writing to ports:
// https://electronics.stackexchange.com/questions/139117/atmels-arm-programming-without-asf
// And here: https://community.atmel.com/forum/getting-started-arm-3
#define PORT_SET_PIN(port,port_pin) PORT_IOBUS->Group[port].OUTSET.reg = port_pin // Set to 1; Time with 40MHz is 190nsec
// #define PORT_SET_PIN(portnr,pin) PORT_IOBUS->Group[portnr].OUTSET.reg = pin // Set to 1; Time with 40MHz is 190nsec
#define PORT_CLR_PIN(portnr,pin) PORT_IOBUS->Group[portnr].OUTCLR.reg = pin // Set to 0
#define PORT_TOGGLE_PIN(portnr,pin) PORT_IOBUS->Group[portnr].OUTTGL.reg = pin // Toggle pin
#define PORT_OUTPUT_PIN(portnr,pin) PORT_IOBUS->Group[portnr].DIRSET.reg = pin // port.DIRSET.reg = pin // Set pin to output
#define PORT_INPUT_PIN(portnr,pin) PORT_IOBUS->Group[portnr].DIRCLR.reg = pin // port.DIRCLR.reg = pin // Set pin to input
#define PORT_INPUT_PIN_EN(portnr,pin) PORT->Group[portnr].PINCFG[pin].bit.INEN = 1
#define PORT_READ_PIN(portnr,pin) PORT_IOBUS->Group[portnr].IN[pin]
#define PORT_READ(portnr) PORT->Group[portnr].IN.reg
#define PORT_SET_CTRLSAMPLING(portnr,pin) PORT->Group[portnr].CTRL.reg |= pin;
#define PORT_CLR_CTRLSAMPLING(portnr,pin) PORT->Group[portnr].CTRL.reg &= ~pin;
// Other register fiddling: #define bitwrite SYSCTRL->VREG.bit.RUNSTDBY = 1
// Definitions
// I/O
// Definitions used for the pin group numbers needed if using the faster IOBUS I/O method. (Can be used for normal PORT as well)
// Group number for PORTA and PORTB
#define PORTA_NR 0
#define PORTB_NR 1
#define LED_0_PIN PORT_PB08 // LED
#define LED0_PIN_PORTNR PORTB_NR
#define MY_OUTPUT_PIN PORT_PA20 // MY_OUTPUT
#define MY_OUTPUT_PIN_PORTNR PORTA_NR
#define MY_INPUT_PIN PORT_PB02 // MY_INPUT
#define MY_INPUT_PIN_PORTNR PORTB_NR
// And so on for all pins...
/* SPI if used
#define SCK PIN_PA17
#define MOSI PIN_PA16
#define MISO PIN_PA19
*/
// Functions
void ArduinoZeroTemplateInit(void);
void ArduinoZeroTemplate(void);
void Update1msClock(void);
// Put any typedefs here
#endif /* ARDUINOZEROTEMPLATE_H_ */
\ No newline at end of file
ArduinoZeroTemplateClocks.h deleted 100644 → 0
+ 0
− 155
View file @ ceb88d6b
/*
* ArduinoZeroemplateClocks.h
*
* Created: 2020-12-09 09:50:42
* Author: ilosz01
*/
// System clock bus configuration
# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
# define CONF_CLOCK_FLASH_WAIT_STATES 1 // Changed from 0 to 1 if using DFLL clock > 24 MHz.
# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
# define CONF_CLOCK_APBA_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
# define CONF_CLOCK_APBB_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
# define CONF_CLOCK_APBC_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
// SYSTEM_CLOCK_SOURCE_OSC8M configuration - Internal 8MHz oscillator
# define CONF_CLOCK_OSC8M_PRESCALER SYSTEM_OSC8M_DIV_1
# define CONF_CLOCK_OSC8M_ON_DEMAND true
# define CONF_CLOCK_OSC8M_RUN_IN_STANDBY false
// SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator
# define CONF_CLOCK_XOSC_ENABLE false
# define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
# define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY 12000000UL
# define CONF_CLOCK_XOSC_STARTUP_TIME SYSTEM_XOSC_STARTUP_32768
# define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL true
# define CONF_CLOCK_XOSC_ON_DEMAND true
# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
// SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator
# define CONF_CLOCK_XOSC32K_ENABLE true // Used to synchronize DFLL. (Can be used for low power clock also).
# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
# define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL false
# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
# define CONF_CLOCK_XOSC32K_ON_DEMAND true
# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY false
// SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator
# define CONF_CLOCK_OSC32K_ENABLE false
# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
# define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT true
# define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT true
# define CONF_CLOCK_OSC32K_ON_DEMAND true
# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
# define CONF_CLOCK_DFLL_ENABLE true
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN
# define CONF_CLOCK_DFLL_ON_DEMAND false
// DFLL open loop mode configuration
# define CONF_CLOCK_DFLL_FINE_VALUE (512)
// DFLL closed loop mode configuration
# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
# define CONF_CLOCK_DFLL_QUICK_LOCK true
# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 4)
# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 4)
// SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop
# define CONF_CLOCK_DPLL_ENABLE true
# define CONF_CLOCK_DPLL_ON_DEMAND true
# define CONF_CLOCK_DPLL_RUN_IN_STANDBY false
# define CONF_CLOCK_DPLL_LOCK_BYPASS false
# define CONF_CLOCK_DPLL_WAKE_UP_FAST false
# define CONF_CLOCK_DPLL_LOW_POWER_ENABLE false
# define CONF_CLOCK_DPLL_LOCK_TIME SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
# define CONF_CLOCK_DPLL_REFERENCE_CLOCK SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
# define CONF_CLOCK_DPLL_FILTER SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
# define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY 32768
# define CONF_CLOCK_DPLL_REFERENCE_DIVIDER 1
# define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY 48000000
// DPLL GCLK reference configuration
# define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
// DPLL GCLK lock timer configuration
# define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR GCLK_GENERATOR_1
// Set this to true to configure the GCLK when running clocks_init. If set to
// * false, none of the GCLK generators will be configured in clocks_init().
# define CONF_CLOCK_CONFIGURE_GCLK true
/* Configure GCLK generator 0 (Main Clock) */
# define CONF_CLOCK_GCLK_0_ENABLE true
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DPLL // SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_0_PRESCALER 1
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
/* Configure GCLK generator 1 (DFLL Clock) */
# define CONF_CLOCK_GCLK_1_ENABLE true
# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
# define CONF_CLOCK_GCLK_1_PRESCALER 1
# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE false
/* Configure GCLK generator 2 (RTC) */
# define CONF_CLOCK_GCLK_2_ENABLE true
# define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY true
# define CONF_CLOCK_GCLK_2_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
# define CONF_CLOCK_GCLK_2_PRESCALER 1
# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
/* Configure GCLK generator 3 (SPI Clock) */
# define CONF_CLOCK_GCLK_3_ENABLE true
# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M //SYSTEM_CLOCK_SOURCE_DPLL //SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_3_PRESCALER 1
# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
/* Configure GCLK generator */
# define CONF_CLOCK_GCLK_4_ENABLE false
# define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_4_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_4_PRESCALER 1
# define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE false
/* Configure GCLK generator 5 */
# define CONF_CLOCK_GCLK_5_ENABLE false
# define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_5_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_5_PRESCALER 1
# define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE false
/* Configure GCLK generator 6 */
# define CONF_CLOCK_GCLK_6_ENABLE false
# define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_6_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_6_PRESCALER 1
# define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE false
/* Configure GCLK generator 7 */
# define CONF_CLOCK_GCLK_7_ENABLE false
# define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_7_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_7_PRESCALER 1
# define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE false
/* Configure GCLK generator 8 */
# define CONF_CLOCK_GCLK_8_ENABLE false
# define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_8_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
# define CONF_CLOCK_GCLK_8_PRESCALER 1
# define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE false
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