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Commit 37a9ab1d authored by Oscar Gustafsson's avatar Oscar Gustafsson
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Refactor MiaRegister to IntegerRegister

parent 72f50114
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1 merge request!2Refactor MiaRegister to IntegerRegister (including GUI)
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with 133 additions and 146 deletions
......@@ -58,11 +58,6 @@ Included modules
:undoc-members:
:show-inheritance:
.. automodule:: simudator.processor.mia.mia_register
:members:
:undoc-members:
:show-inheritance:
.. automodule:: simudator.processor.mia.micro_pc
:members:
:undoc-members:
......
......@@ -115,4 +115,4 @@ class Module:
return self.name
def __repr__(self) -> str:
return self.name
return f"Module({self.name!r})"
......@@ -96,3 +96,75 @@ class Register(Module):
print("", self.name, "\n -----",
"\n value: ", self.value,
)
class IntegerRegister(Register):
"""
A simple module that can store an integer value with a given bit-length.
"""
def __init__(self, input_signal: Signal, output_signal: Signal,
bit_length: int, value: int=0, name=None) -> None:
# set the registers name
if name is None:
name = f"{bit_length}-bit register"
super().__init__(input_signal, output_signal, value=value, name=name)
# set the bit length of the register
self.bit_length = bit_length
# set the registers mask. An 8 bit register should
# have the mask 1111 1111, aka one '1' for every bit
self.mask = 2**bit_length -1
def update_register(self) -> None:
"""
Propagate the input signal to the registers internal state.
Throw away bits larger than the length of the register.
"""
super().update_register()
self.value = self.value & self.mask
def get_state(self) -> dict[str: Any]:
"""
Returns a dict of the register state.
These states are changable via set_states.
"""
state = super().get_state()
state["bit_length"] = self.bit_length
state["mask"] = self.mask
return state
def set_state(self, state: dict[str: Any]) -> None:
"""
Sets the register state to one given in dict.
"""
super().set_state(state)
if "bit_length" in state:
self.bit_length = state["bit_length"]
self.mask = 2**self.bit_length -1
def reset(self) -> None:
self.value = 0
def get_input_signals(self) -> list[Signal]:
return [self.input_s]
def get_output_signals(self) -> list[Signal]:
return [self.output_s]
def save_state_to_file(self, file_path: str) -> None:
"""
Tries to save the modules state to a given file.
"""
file = open(file_path, "a")
file.write(self.name + ":\n")
file.write("value: " + hex(self.value)[2:] + "\n\n")
file.close()
def load_from_str(self, state_string):
string_pair = state_string.split(": ")
#TODO: Maybe check if it starts with value: ?
self.value = int(string_pair[1], 16)
......@@ -12,9 +12,6 @@ from simudator.gui.module_graphics_item.mia.mia_memory_graphic import (
from simudator.gui.module_graphics_item.mia.mia_micro_memory_graphic import (
MicroMemoryGraphicsItem,
)
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
MiaRegisterGraphicsItem,
)
from simudator.gui.module_graphics_item.mia.pc_graphic import PcGraphicsItem
from simudator.gui.module_graphics_item.mia.supc_graphic import SupcGraphicsItem
from simudator.gui.module_graphics_item.mia.upc_graphic import uPcGraphicsItem
......@@ -22,6 +19,5 @@ from simudator.gui.module_graphics_item.mia.upc_graphic import uPcGraphicsItem
__all__ = ["MiaMemoryGraphicsItem", "MicroMemoryGraphicsItem", "ArGraphicsItem",
"PcGraphicsItem", "AsrGraphicsItem", "HrGraphicsItem",
"SupcGraphicsItem", "uPcGraphicsItem", "FlagGraphicsItem",
"BusGraphicsItem", "AluGraphicsItem", "GrxGraphicsItem", "IrGraphicsItem",
"MiaRegisterGraphicsItem"
"BusGraphicsItem", "AluGraphicsItem", "GrxGraphicsItem", "IrGraphicsItem"
]
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
class ArGraphicsItem(RegisterGraphicsItem):
class ArGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics item for mias AR register
"""
......
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
class AsrGraphicsItem(RegisterGraphicsItem):
class AsrGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics item for mias ASR module.
"""
......
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.port_graphics_item import PortGraphicsItem
class HrGraphicsItem(RegisterGraphicsItem):
class HrGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics module for mia's HR module.
"""
......
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.core.modules.register import IntegerRegister
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.processor.mia.mia_register import MiaRegister
class FlagGraphicsItem(RegisterGraphicsItem):
class FlagGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics module for mia's flag module.
"""
def __init__(self, module: MiaRegister):
def __init__(self, module: IntegerRegister):
super().__init__(module)
def draw_graphics_item(self):
......
import math
from simudator.gui.module_graphics_item.register_graphic import RegisterGraphicsItem
class MiaRegisterGraphicsItem(RegisterGraphicsItem):
"""
A general garphics item for mia's register modules.
Other mia register modules inherit this to get the same shape.
"""
def update(self):
self.state = self.module.get_state()
name = self.state["name"]
value = self.state["value"]
hex_length = math.ceil(self.state["bit_length"]/4)
value_text = f"{value:0{hex_length}x}"
full_text = name + ": " + value_text
self.text.setText(full_text)
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.port_graphics_item import PortGraphicsItem
class PcGraphicsItem(RegisterGraphicsItem):
class PcGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics module for mia's pc module.
"""
......
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
class SupcGraphicsItem(RegisterGraphicsItem):
class SupcGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics module for mia's supc module.
"""
......
from simudator.gui.module_graphics_item.mia.mia_register_graphic import (
RegisterGraphicsItem,
from simudator.gui.module_graphics_item.register_graphic import (
IntegerRegisterGraphicsItem,
)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
class uPcGraphicsItem(RegisterGraphicsItem):
class uPcGraphicsItem(IntegerRegisterGraphicsItem):
"""
Graphics module for mia's micro pc module.
"""
......
import math
from qtpy.QtWidgets import QGraphicsRectItem, QGraphicsSimpleTextItem
from simudator.gui.module_graphics_item.module_graphics_item import ModuleGraphicsItem
......@@ -39,3 +41,21 @@ class RegisterGraphicsItem(ModuleGraphicsItem):
full_text = name + ": " + value_text
self.text.setText(full_text)
class IntegerRegisterGraphicsItem(RegisterGraphicsItem):
"""
A general garphics item for mia's register modules.
Other mia register modules inherit this to get the same shape.
"""
def update(self):
self.state = self.module.get_state()
name = self.state["name"]
value = self.state["value"]
hex_length = math.ceil(self.state["bit_length"]/4)
value_text = f"{value:0{hex_length}x}"
full_text = name + ": " + value_text
self.text.setText(full_text)
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
from simudator.processor.mia.mia_bus_connect import MiaBusConnector
from simudator.processor.mia.mia_register import MiaRegister
class AR(MiaRegister, MiaBusConnector):
class AR(IntegerRegister, MiaBusConnector):
"""
Register for saving AlU calculations in MIA.
"""
......@@ -19,7 +19,7 @@ class AR(MiaRegister, MiaBusConnector):
self.alu_output_signal = alu_output_signal
MiaRegister.__init__(self, alu_input_signal, bus_output_signal,
IntegerRegister.__init__(self, alu_input_signal, bus_output_signal,
bit_length, name=name)
MiaBusConnector.__init__(self, bus_control_signal, bus_id)
......@@ -30,13 +30,13 @@ class AR(MiaRegister, MiaBusConnector):
# only update bus when asked too
if self.write_to_bus():
MiaRegister.output_register(self)
IntegerRegister.output_register(self)
else:
self.output_s.update_value(None)
def update_logic(self) -> None:
if self.write_to_bus():
MiaRegister.output_register(self)
IntegerRegister.output_register(self)
else:
self.output_s.update_value(None)
......
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
from simudator.processor.mia.mia_bus_connect import MiaBusConnector
from simudator.processor.mia.mia_register import MiaRegister
class ASR(MiaRegister, MiaBusConnector):
class ASR(IntegerRegister, MiaBusConnector):
"""
Register for controlling the memory andress in MIA.
"""
......@@ -16,13 +16,13 @@ class ASR(MiaRegister, MiaBusConnector):
bit_length: int,
name = "ASR") -> None:
MiaRegister.__init__(self, bus_input_signal, memory_output_signal,
IntegerRegister.__init__(self, bus_input_signal, memory_output_signal,
bit_length, name=name)
MiaBusConnector.__init__(self, bus_control_signal, bus_id)
def update_register(self) -> None:
if self.read_from_bus():
MiaRegister.update_register(self)
IntegerRegister.update_register(self)
def update_logic(self) -> None:
if self.write_to_bus():
......
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
from simudator.processor.mia.mia_bus_connect import MiaBusConnector
from simudator.processor.mia.mia_register import MiaRegister
class HR(MiaRegister, MiaBusConnector):
class HR(IntegerRegister, MiaBusConnector):
"""
Register for saving large AlU calculations in MIA.
"""
......@@ -23,7 +23,7 @@ class HR(MiaRegister, MiaBusConnector):
self.alu_input_signal.add_destination(self)
MiaRegister.__init__(self, bus_input_signal, bus_output_signal,
IntegerRegister.__init__(self, bus_input_signal, bus_output_signal,
bit_lenght, name=name)
MiaBusConnector.__init__(self, bus_control_signal, bus_id)
......@@ -35,7 +35,7 @@ class HR(MiaRegister, MiaBusConnector):
"""
if self.read_from_bus():
MiaRegister.update_register(self)
IntegerRegister.update_register(self)
elif self.alu_input_signal.get_value() is not None:
input_value = self.alu_input_signal.get_value()
......@@ -51,7 +51,7 @@ class HR(MiaRegister, MiaBusConnector):
self.alu_output_signal.update_value(self.value)
if self.write_to_bus():
MiaRegister.output_register(self)
IntegerRegister.output_register(self)
else:
self.output_s.update_value(None)
......
......@@ -4,6 +4,7 @@ from qtpy.QtWidgets import QApplication
from simudator.cli.cli import CLI
from simudator.core.modules.flag import Flag
from simudator.core.modules.register import IntegerRegister
from simudator.core.processor import Processor, Signal
from simudator.gui.gui import GUI
from simudator.gui.module_graphics_item.mia import (
......@@ -30,7 +31,6 @@ from simudator.processor.mia.ir import IR
from simudator.processor.mia.lc import LC
from simudator.processor.mia.mia_grx import GRX
from simudator.processor.mia.mia_memory import MiaMemory
from simudator.processor.mia.mia_register import MiaRegister
from simudator.processor.mia.micro_memory import MicroMemory
from simudator.processor.mia.micro_pc import MicroPC
......@@ -175,7 +175,7 @@ class MIA_CPU(Processor):
# Su_PC specific
SuPC_bit_length = 7
SuPC_name = "SuPC"
Su_PC = MiaRegister(SuPC_uPC, uPC_SuPC, SuPC_bit_length,
Su_PC = IntegerRegister(SuPC_uPC, uPC_SuPC, SuPC_bit_length,
default_value, SuPC_name)
# uM specific
......
from __future__ import annotations
from typing import Any
from simudator.core.modules.register import Register
from simudator.core.signal import Signal
class MiaRegister(Register):
"""
A simple module that can store a value.
"""
def __init__(self, input_signal: Signal, output_signal: Signal,
bit_length: int, value=0, name="Register") -> None:
# set the registers name
super().__init__(input_signal, output_signal, value=value, name=name)
# set the bit length of the register
self.bit_length = bit_length
# set the registers mask. An 8 bit register should
# have the mask 1111 1111, aka one '1' for every bit
self.mask = 2**bit_length -1
def update_register(self) -> None:
"""
Propagate the input signal to the registers internal state.
Throw away bits larger than the length of the register.
"""
super().update_register()
self.value = self.value & self.mask
def get_state(self) -> dict[str: Any]:
"""
Returns a dict of the register state.
These states are changable via set_states.
"""
state = super().get_state()
state["bit_length"] = self.bit_length
state["mask"] = self.mask
return state
def set_state(self, state: dict[str: Any]) -> None:
"""
Sets the register state to one given in dict.
"""
super().set_state(state)
if "bit_length" in state:
self.bit_length = state["bit_length"]
self.mask = 2**self.bit_length -1
def reset(self) -> None:
self.value = 0
def get_input_signals(self) -> list[Signal]:
return [self.input_s]
def get_output_signals(self) -> list[Signal]:
return [self.output_s]
def save_state_to_file(self, file_path: str) -> None:
"""
Tries to save the modules state to a given file.
"""
file = open(file_path, "a")
file.write(self.name + ":\n")
file.write("value: " + hex(self.value)[2:] + "\n\n")
file.close()
def load_from_str(self, state_string):
string_pair = state_string.split(": ")
#TODO: Maybe check if it starts with value: ?
self.value = int(string_pair[1], 16)
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