From 855868ba453a6849a3f5141ec7fff1a60592c5f9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20H=C3=B6gstedt?= <marin.hogstedt@hotmail.com>
Date: Tue, 11 Jun 2024 10:59:04 +0200
Subject: [PATCH] asm instr and clock cycle stepping is now fixed
---
src/simudator/core/processor.py | 3 ---
src/simudator/gui/gui.py | 1 -
src/simudator/processor/mia/mia.py | 14 +++++++++++++-
3 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/src/simudator/core/processor.py b/src/simudator/core/processor.py
index 88f8c96..1fc0ee1 100644
--- a/src/simudator/core/processor.py
+++ b/src/simudator/core/processor.py
@@ -253,10 +253,7 @@ class Processor:
try:
module_states = self.module_history[cycle_index]
- print(cycle_index)
except IndexError:
- print(cycle_index)
- print(321)
raise IndexError
diff --git a/src/simudator/gui/gui.py b/src/simudator/gui/gui.py
index ebab5d4..53fc5e1 100644
--- a/src/simudator/gui/gui.py
+++ b/src/simudator/gui/gui.py
@@ -928,7 +928,6 @@ class GUI(QMainWindow):
"""
Undos as many processor cycles as the number entered in the box.
"""
- print(self.cpu.assembly_cycles)
try:
steps = self.asm_jump_value_box.value()
self.cpu.undo_asm_instruction(steps)
diff --git a/src/simudator/processor/mia/mia.py b/src/simudator/processor/mia/mia.py
index c2a30a2..8b87db1 100644
--- a/src/simudator/processor/mia/mia.py
+++ b/src/simudator/processor/mia/mia.py
@@ -335,9 +335,16 @@ class MIA_CPU(Processor):
said number of asm intructions started and loading that clock cycle.
"""
+ current_clock_cycle = self.clock
index = len(self.assembly_cycles)
+ saved_cycle = self.assembly_cycles[index-1]
+
+ # Make sure we are undoing the instruction(s) we are currently on
+ while saved_cycle >= current_clock_cycle:
+ index -= 1
+ saved_cycle = self.assembly_cycles[index-1]
+
index -= num_instructions
- index -= 1
# We cant undo more instructions than we have performed.
if index < 0:
@@ -346,6 +353,11 @@ class MIA_CPU(Processor):
clockcycle = self.assembly_cycles[index]
self.load_cycle(clockcycle)
+
+ # Need +1 here since we save the start state to enable to
+ # load the start state. This is done since we only append clock
+ # cycles to the list self.assembly_cycles when we reach a new state
+ # that has uPC set to 0, which wont happend when we load a new file.
self.assembly_cycles = self.assembly_cycles[:index+1]
--
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