diff --git a/src/simudator/core/processor.py b/src/simudator/core/processor.py
index 88f8c9662563b6443a767baec4782b580160a2d3..1fc0ee17a7f26ac14474125ecc740b63eb23eda4 100644
--- a/src/simudator/core/processor.py
+++ b/src/simudator/core/processor.py
@@ -253,10 +253,7 @@ class Processor:
 
         try:
             module_states = self.module_history[cycle_index]
-            print(cycle_index)
         except IndexError:
-            print(cycle_index)
-            print(321)
             raise IndexError
 
 
diff --git a/src/simudator/gui/gui.py b/src/simudator/gui/gui.py
index ebab5d4a6e2f14703a8be800518ed366ba076dfc..53fc5e1ec460cf4d07348e53fce8926b3ea1a9bf 100644
--- a/src/simudator/gui/gui.py
+++ b/src/simudator/gui/gui.py
@@ -928,7 +928,6 @@ class GUI(QMainWindow):
         """
         Undos as many processor cycles as the number entered in the box.
         """
-        print(self.cpu.assembly_cycles)
         try:
             steps = self.asm_jump_value_box.value()
             self.cpu.undo_asm_instruction(steps)
diff --git a/src/simudator/processor/mia/mia.py b/src/simudator/processor/mia/mia.py
index c2a30a2b4ba30467cfaea6611fd27a690528cfb5..8b87db102fa8aa245af13d7e1e991dc62bfbac19 100644
--- a/src/simudator/processor/mia/mia.py
+++ b/src/simudator/processor/mia/mia.py
@@ -335,9 +335,16 @@ class MIA_CPU(Processor):
         said number of asm intructions started and loading that clock cycle.
         """
 
+        current_clock_cycle = self.clock
         index = len(self.assembly_cycles)
+        saved_cycle = self.assembly_cycles[index-1]
+
+        # Make sure we are undoing the instruction(s) we are currently on
+        while saved_cycle >= current_clock_cycle:
+            index -= 1
+            saved_cycle = self.assembly_cycles[index-1]
+
         index -= num_instructions
-        index -= 1
 
         # We cant undo more instructions than we have performed.
         if index < 0:
@@ -346,6 +353,11 @@ class MIA_CPU(Processor):
         clockcycle = self.assembly_cycles[index]
 
         self.load_cycle(clockcycle)
+
+        # Need +1 here since we save the start state to enable to 
+        # load the start state. This is done since we only append clock
+        # cycles to the list self.assembly_cycles when we reach a new state
+        # that has uPC set to 0, which wont happend when we load a new file.
         self.assembly_cycles = self.assembly_cycles[:index+1]