diff --git a/src/simudator/core/processor.py b/src/simudator/core/processor.py
index 91882c7925157c8cfaca04164b8fa2de6f03f894..b7049beb389e19b2623e57ad92d91e92cb9ac153 100644
--- a/src/simudator/core/processor.py
+++ b/src/simudator/core/processor.py
@@ -17,27 +17,40 @@ from .signal import Signal
 class Processor:
     """
     Main class for controlling the processor.
+
     Uses modules and signals to simulate processor components behaviour.
     """
 
-    def __init__(self):
+    LINE_SEPARATOR = "-"
+    MAX_LINE_LEN = 170
+    CYCLES_TO_SAVE = 10000
+
+    def __init__(self) -> None:
+        # For simulation
         self.modules: dict[str, Module] = dict()
         self.signals = []
         self.clock = 0
         self.update_queue = []
-        self.module_history: list[dict[str, dict[str, Any]]] = []
-        self.signal_history: list[list] = []  # TODO: Is this needed?
+        self.is_stopped = False
+
+        # Breakpoint handling
         self.breakpoint_id_counter = 1
         self.breakpoints: dict[int, Breakpoint] = {}
         self.breakpoint_reached = False
         self.last_breakpoint = None
-        self.cycles_to_save = 10000
+        self.lambdas: dict[str, Callable[..., bool]] = {}
+
+        # Saving processor state for saving/loading to file and undoing ticks
         self.removed_cycles = 0
-        self.max_line_len = 170
-        self.line_seperator = "-"
-        self.is_stopped = False
+        self.assembly_cycles = [0]  # Map asm instruction to clock cycle
+        self.module_history: list[dict[str, dict[str, Any]]] = []
+        self.signal_history: list[list] = []  # TODO: Is this needed?
+
+        # For showing which instructions are being done and signalling
+        # the start of a new one
         self.new_instruction = False
         self.current_instructions: list[str] = []
+
         # TODO: keeping track of what pieces of info not to show
         # show not be done at the processor level.
         # Maybe implemenet a 'get_pretty_print_state' at module
@@ -51,18 +64,13 @@ class Processor:
             "decrement_by_one",
             "bus_id",
         ]
-        self.lambdas: dict[str, Callable[..., bool]] = {}
-
-        # List containing all clock cycles where a new asm instruction started
-        self.assembly_cycles = [0]
 
     def do_tick(self) -> None:
-        """
-        Simulate one clock cycle of the processor.
+        """Simulate one clock cycle of the processor.
 
         Run each module's tick function, then handle the following updates.
         Also check for breakpoints that are reached in this cycle, and save
-        clock cycles when new assemly instructions are started.
+        clock cycles when new assembly instructions are started.
         """
         if len(self.module_history) > self.clock - self.removed_cycles:
             # If a previous stored cycle has been loaded, discard
@@ -99,8 +107,9 @@ class Processor:
             self.new_instruction = False
 
     def get_current_instruction(self) -> str:
-        """
-        Return the current instruction. Useful for pipeline diagram.
+        """Return the current instruction.
+
+        Useful for pipeline diagram.
         """
         raise NotImplemented
 
@@ -283,7 +292,7 @@ class Processor:
 
         # Only save a specified number of cycles,
         # saving every cycle can easily eat all ram
-        if len(self.module_history) > self.cycles_to_save:
+        if len(self.module_history) > Processor.CYCLES_TO_SAVE:
             self.module_history.pop(0)
             self.removed_cycles += 1
 
@@ -427,7 +436,7 @@ class Processor:
 
         groups = self.group_pp_modules(module_to_line_length)
 
-        print(self.line_seperator * self.max_line_len)
+        print(self.line_seperator * Processor.MAX_LINE_LEN)
 
         # print each group seperate
         for group in groups:
@@ -466,14 +475,14 @@ class Processor:
                     string = string[0:-2] + "| "
 
                 print(string)
-            print(self.line_seperator * self.max_line_len)
+            print(self.line_seperator * Processor.MAX_LINE_LEN)
 
         for memory_module in memory_modules:
             self.pretty_print_memory(memory_module)
 
     def pretty_print_memory(self, module: Module) -> None:
         print(module.name)
-        print(self.line_seperator * self.max_line_len)
+        print(self.line_seperator * Processor.MAX_LINE_LEN)
 
         longest_line_len = module.get_longest_line_len()
         # longest_line_len = self.get_longest_memory_value(module.memory)
@@ -491,7 +500,7 @@ class Processor:
 
             # only add the string if there is space for it, else
             # print the string and start a new
-            if len(string + new_row) + 1 > self.max_line_len:
+            if len(string + new_row) + 1 > Processor.MAX_LINE_LEN:
                 print(string)
                 string = new_row
             else:
@@ -502,7 +511,7 @@ class Processor:
                 else:
                     string = new_row
         print(string)
-        print(self.line_seperator * self.max_line_len)
+        print(self.line_seperator * Processor.MAX_LINE_LEN)
         print()
 
     def pretty_print_names(self, module_to_line_length: dict[Module, int]) -> None:
@@ -528,7 +537,7 @@ class Processor:
     ) -> list[dict[Module, int]]:
         """
         Groups the modules to be pretty printed into groups with a
-        total line length lower than 'self.max_line_len'.
+        total line length lower than 'Processor.MAX_LINE_LEN'.
         """
 
         groups = [{}]
@@ -537,7 +546,7 @@ class Processor:
         for module in module_to_line_length:
 
             # Make sure the line is not to long
-            if line_len + module_to_line_length[module] < self.max_line_len:
+            if line_len + module_to_line_length[module] < Processor.MAX_LINE_LEN:
                 line_len += module_to_line_length[module]
                 groups[group_index][module] = module_to_line_length[module]