From 62e8e97cd28aef8b867eee4bce7802c74cc2882d Mon Sep 17 00:00:00 2001
From: Martin <martin.hogstedt@hotmail.com>
Date: Mon, 17 Jun 2024 13:40:58 +0200
Subject: [PATCH] i forgot to comment
---
src/simudator/processor/mia/modules/asr.py | 3 +++
src/simudator/processor/mia/modules/mia_grx.py | 3 +++
src/simudator/processor/mia/modules/mia_memory.py | 3 +++
src/simudator/processor/mia/modules/pc.py | 3 +++
4 files changed, 12 insertions(+)
diff --git a/src/simudator/processor/mia/modules/asr.py b/src/simudator/processor/mia/modules/asr.py
index ba33b47..ae096c0 100644
--- a/src/simudator/processor/mia/modules/asr.py
+++ b/src/simudator/processor/mia/modules/asr.py
@@ -8,6 +8,9 @@ class ASR(IntegerRegister, MiaBusConnector):
Register for controlling the memory andress in MIA.
"""
+ # Python does not allow multiple inherintence if more than one of the
+ # parent classes uses __slots__. Thus we also includes the __slots__
+ # from MiaBusConnector.
__slots__ = ("bus_id", "bus_control_s")
def __init__(
diff --git a/src/simudator/processor/mia/modules/mia_grx.py b/src/simudator/processor/mia/modules/mia_grx.py
index 135b930..d384aa6 100644
--- a/src/simudator/processor/mia/modules/mia_grx.py
+++ b/src/simudator/processor/mia/modules/mia_grx.py
@@ -14,6 +14,9 @@ class GRX(Module, MiaBusConnector):
registers should be indexed by the GRx bits or the M bits.
"""
+ # Python does not allow multiple inherintence if more than one of the
+ # parent classes uses __slots__. Thus we also includes the __slots__
+ # from MiaBusConnector.
__slots__ = (
"grx_control",
"m_control",
diff --git a/src/simudator/processor/mia/modules/mia_memory.py b/src/simudator/processor/mia/modules/mia_memory.py
index b4b2e81..988f506 100644
--- a/src/simudator/processor/mia/modules/mia_memory.py
+++ b/src/simudator/processor/mia/modules/mia_memory.py
@@ -11,6 +11,9 @@ class MiaMemory(MiaBusConnector, Memory):
to/from the mia bus.
"""
+ # Python does not allow multiple inherintence if more than one of the
+ # parent classes uses __slots__. Thus we also includes the __slots__
+ # from MiaBusConnector.
__slots__ = ("label_adress_mapping", "bus_id", "bus_control_s")
def __init__(
diff --git a/src/simudator/processor/mia/modules/pc.py b/src/simudator/processor/mia/modules/pc.py
index 4918b45..f955243 100644
--- a/src/simudator/processor/mia/modules/pc.py
+++ b/src/simudator/processor/mia/modules/pc.py
@@ -17,6 +17,9 @@ class PC(Module, MiaBusConnector):
value on the bus. If both are true it does nothing.
"""
+ # Python does not allow multiple inherintence if more than one of the
+ # parent classes uses __slots__. Thus we also includes the __slots__
+ # from MiaBusConnector.
__slots__ = ("bus_id", "bus_control_s", "value", "increase_by_one")
def __init__(
--
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