From 4411fb2f998ea0131f0366720e8db5a523c6fdee Mon Sep 17 00:00:00 2001
From: Oscar Gustafsson <oscar.gustafsson@gmail.com>
Date: Thu, 14 Sep 2023 19:40:03 +0200
Subject: [PATCH] Refactor MIA blocks
---
src/simudator/core/processor.py | 4 +--
.../gui/module_graphics_item/mia/__init__.py | 33 -------------------
src/simudator/processor/__init__.py | 0
src/simudator/processor/mia/__init__.py | 0
src/simudator/processor/mia/gui/__init__.py | 29 ++++++++++++++++
.../mia => processor/mia/gui}/ar_graphic.py | 0
.../mia => processor/mia/gui}/asr_graphic.py | 0
.../mia => processor/mia/gui}/bus_graphic.py | 0
.../mia => processor/mia/gui}/hr_graphic.py | 0
.../mia/gui}/mia_alu_graphic.py | 0
.../mia/gui}/mia_flag_graphic.py | 0
.../mia/gui}/mia_grx_graphic.py | 4 +--
.../mia/gui}/mia_ir_graphic.py | 0
.../mia/gui}/mia_memory_content_dialog.py | 0
.../mia/gui}/mia_memory_graphic.py | 4 +--
.../mia/gui}/mia_micro_memory_graphic.py | 6 ++--
.../mia => processor/mia/gui}/pc_graphic.py | 0
.../mia => processor/mia/gui}/supc_graphic.py | 0
.../mia => processor/mia/gui}/upc_graphic.py | 0
src/simudator/processor/mia/mia.py | 26 +++++++--------
.../processor/mia/modules/__init__.py | 0
.../processor/mia/{ => modules}/alu.py | 0
.../processor/mia/{ => modules}/ar.py | 2 +-
.../processor/mia/{ => modules}/asr.py | 2 +-
.../processor/mia/{ => modules}/bus.py | 0
.../processor/mia/{ => modules}/hr.py | 2 +-
.../processor/mia/{ => modules}/ir.py | 2 +-
.../processor/mia/{ => modules}/lc.py | 0
.../mia/{ => modules}/mia_bus_connect.py | 0
.../processor/mia/{ => modules}/mia_grx.py | 2 +-
.../processor/mia/{ => modules}/mia_memory.py | 2 +-
.../mia/{ => modules}/micro_memory.py | 0
.../processor/mia/{ => modules}/micro_pc.py | 0
.../processor/mia/{ => modules}/pc.py | 2 +-
test/test_mia/test_alu.py | 2 +-
test/test_mia/test_bus.py | 6 ++--
test/test_mia/test_ir.py | 2 +-
test/test_mia/test_lc.py | 2 +-
test/test_mia/test_mia_grx.py | 2 +-
test/test_mia/test_mia_memory.py | 2 +-
test/test_mia/test_mia_register.py | 6 ++--
test/test_mia/test_micro_memory.py | 2 +-
test/test_mia/test_micro_pc.py | 2 +-
test/test_mia/test_pc.py | 2 +-
44 files changed, 70 insertions(+), 78 deletions(-)
delete mode 100644 src/simudator/gui/module_graphics_item/mia/__init__.py
create mode 100644 src/simudator/processor/__init__.py
create mode 100644 src/simudator/processor/mia/__init__.py
create mode 100644 src/simudator/processor/mia/gui/__init__.py
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/ar_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/asr_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/bus_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/hr_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_alu_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_flag_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_grx_graphic.py (97%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_ir_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_memory_content_dialog.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_memory_graphic.py (97%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/mia_micro_memory_graphic.py (94%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/pc_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/supc_graphic.py (100%)
rename src/simudator/{gui/module_graphics_item/mia => processor/mia/gui}/upc_graphic.py (100%)
create mode 100644 src/simudator/processor/mia/modules/__init__.py
rename src/simudator/processor/mia/{ => modules}/alu.py (100%)
rename src/simudator/processor/mia/{ => modules}/ar.py (95%)
rename src/simudator/processor/mia/{ => modules}/asr.py (94%)
rename src/simudator/processor/mia/{ => modules}/bus.py (100%)
rename src/simudator/processor/mia/{ => modules}/hr.py (96%)
rename src/simudator/processor/mia/{ => modules}/ir.py (98%)
rename src/simudator/processor/mia/{ => modules}/lc.py (100%)
rename src/simudator/processor/mia/{ => modules}/mia_bus_connect.py (100%)
rename src/simudator/processor/mia/{ => modules}/mia_grx.py (98%)
rename src/simudator/processor/mia/{ => modules}/mia_memory.py (97%)
rename src/simudator/processor/mia/{ => modules}/micro_memory.py (100%)
rename src/simudator/processor/mia/{ => modules}/micro_pc.py (100%)
rename src/simudator/processor/mia/{ => modules}/pc.py (98%)
diff --git a/src/simudator/core/processor.py b/src/simudator/core/processor.py
index b526996..5a7be7b 100644
--- a/src/simudator/core/processor.py
+++ b/src/simudator/core/processor.py
@@ -8,8 +8,8 @@ from simudator.core.breakpoint_memory import MemoryBreakpoint
from simudator.core.breakpoint_state import StateBreakpoint
from simudator.core.module import Module
from simudator.core.modules.memory import Memory
-from simudator.processor.mia.bus import Bus
-from simudator.processor.mia.micro_memory import MicroMemory
+from simudator.processor.mia.modules.bus import Bus
+from simudator.processor.mia.modules.micro_memory import MicroMemory
from .signal import Signal
diff --git a/src/simudator/gui/module_graphics_item/mia/__init__.py b/src/simudator/gui/module_graphics_item/mia/__init__.py
deleted file mode 100644
index 23fa55a..0000000
--- a/src/simudator/gui/module_graphics_item/mia/__init__.py
+++ /dev/null
@@ -1,33 +0,0 @@
-from simudator.gui.module_graphics_item.mia.ar_graphic import ArGraphicsItem
-from simudator.gui.module_graphics_item.mia.asr_graphic import AsrGraphicsItem
-from simudator.gui.module_graphics_item.mia.bus_graphic import BusGraphicsItem
-from simudator.gui.module_graphics_item.mia.hr_graphic import HrGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_alu_graphic import AluGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_flag_graphic import FlagGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_grx_graphic import GrxGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_ir_graphic import IrGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_memory_graphic import (
- MiaMemoryGraphicsItem,
-)
-from simudator.gui.module_graphics_item.mia.mia_micro_memory_graphic import (
- MicroMemoryGraphicsItem,
-)
-from simudator.gui.module_graphics_item.mia.pc_graphic import PcGraphicsItem
-from simudator.gui.module_graphics_item.mia.supc_graphic import SupcGraphicsItem
-from simudator.gui.module_graphics_item.mia.upc_graphic import uPcGraphicsItem
-
-__all__ = [
- "MiaMemoryGraphicsItem",
- "MicroMemoryGraphicsItem",
- "ArGraphicsItem",
- "PcGraphicsItem",
- "AsrGraphicsItem",
- "HrGraphicsItem",
- "SupcGraphicsItem",
- "uPcGraphicsItem",
- "FlagGraphicsItem",
- "BusGraphicsItem",
- "AluGraphicsItem",
- "GrxGraphicsItem",
- "IrGraphicsItem",
-]
diff --git a/src/simudator/processor/__init__.py b/src/simudator/processor/__init__.py
new file mode 100644
index 0000000..e69de29
diff --git a/src/simudator/processor/mia/__init__.py b/src/simudator/processor/mia/__init__.py
new file mode 100644
index 0000000..e69de29
diff --git a/src/simudator/processor/mia/gui/__init__.py b/src/simudator/processor/mia/gui/__init__.py
new file mode 100644
index 0000000..4934a67
--- /dev/null
+++ b/src/simudator/processor/mia/gui/__init__.py
@@ -0,0 +1,29 @@
+from .ar_graphic import ArGraphicsItem
+from .asr_graphic import AsrGraphicsItem
+from .bus_graphic import BusGraphicsItem
+from .hr_graphic import HrGraphicsItem
+from .mia_alu_graphic import AluGraphicsItem
+from .mia_flag_graphic import FlagGraphicsItem
+from .mia_grx_graphic import GrxGraphicsItem
+from .mia_ir_graphic import IrGraphicsItem
+from .mia_memory_graphic import MiaMemoryGraphicsItem
+from .mia_micro_memory_graphic import MicroMemoryGraphicsItem
+from .pc_graphic import PcGraphicsItem
+from .supc_graphic import SupcGraphicsItem
+from .upc_graphic import uPcGraphicsItem
+
+__all__ = [
+ "MiaMemoryGraphicsItem",
+ "MicroMemoryGraphicsItem",
+ "ArGraphicsItem",
+ "PcGraphicsItem",
+ "AsrGraphicsItem",
+ "HrGraphicsItem",
+ "SupcGraphicsItem",
+ "uPcGraphicsItem",
+ "FlagGraphicsItem",
+ "BusGraphicsItem",
+ "AluGraphicsItem",
+ "GrxGraphicsItem",
+ "IrGraphicsItem",
+]
diff --git a/src/simudator/gui/module_graphics_item/mia/ar_graphic.py b/src/simudator/processor/mia/gui/ar_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/ar_graphic.py
rename to src/simudator/processor/mia/gui/ar_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/asr_graphic.py b/src/simudator/processor/mia/gui/asr_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/asr_graphic.py
rename to src/simudator/processor/mia/gui/asr_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/bus_graphic.py b/src/simudator/processor/mia/gui/bus_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/bus_graphic.py
rename to src/simudator/processor/mia/gui/bus_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/hr_graphic.py b/src/simudator/processor/mia/gui/hr_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/hr_graphic.py
rename to src/simudator/processor/mia/gui/hr_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_alu_graphic.py b/src/simudator/processor/mia/gui/mia_alu_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/mia_alu_graphic.py
rename to src/simudator/processor/mia/gui/mia_alu_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_flag_graphic.py b/src/simudator/processor/mia/gui/mia_flag_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/mia_flag_graphic.py
rename to src/simudator/processor/mia/gui/mia_flag_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_grx_graphic.py b/src/simudator/processor/mia/gui/mia_grx_graphic.py
similarity index 97%
rename from src/simudator/gui/module_graphics_item/mia/mia_grx_graphic.py
rename to src/simudator/processor/mia/gui/mia_grx_graphic.py
index 3b4bbf9..a3de6f2 100644
--- a/src/simudator/gui/module_graphics_item/mia/mia_grx_graphic.py
+++ b/src/simudator/processor/mia/gui/mia_grx_graphic.py
@@ -9,11 +9,11 @@ from qtpy.QtWidgets import (
QGraphicsSimpleTextItem,
)
-from simudator.gui.module_graphics_item.mia.bus_graphic import BusGraphicsItem
from simudator.gui.module_graphics_item.module_graphics_item import ModuleGraphicsItem
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
-from simudator.processor.mia.mia_grx import GRX
+from simudator.processor.mia.gui.bus_graphic import BusGraphicsItem
+from simudator.processor.mia.modules.mia_grx import GRX
class GrxGraphicsItem(ModuleGraphicsItem):
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_ir_graphic.py b/src/simudator/processor/mia/gui/mia_ir_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/mia_ir_graphic.py
rename to src/simudator/processor/mia/gui/mia_ir_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_memory_content_dialog.py b/src/simudator/processor/mia/gui/mia_memory_content_dialog.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/mia_memory_content_dialog.py
rename to src/simudator/processor/mia/gui/mia_memory_content_dialog.py
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_memory_graphic.py b/src/simudator/processor/mia/gui/mia_memory_graphic.py
similarity index 97%
rename from src/simudator/gui/module_graphics_item/mia/mia_memory_graphic.py
rename to src/simudator/processor/mia/gui/mia_memory_graphic.py
index 759df32..e3c314a 100644
--- a/src/simudator/gui/module_graphics_item/mia/mia_memory_graphic.py
+++ b/src/simudator/processor/mia/gui/mia_memory_graphic.py
@@ -12,11 +12,9 @@ from qtpy.QtWidgets import (
from simudator.core.modules import Memory
from simudator.gui.color_scheme import ColorScheme as CS
from simudator.gui.module_graphics_item.memory_graphic import MemoryGraphicsItem
-from simudator.gui.module_graphics_item.mia.mia_memory_content_dialog import (
- MiaMemoryContentDialog,
-)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
+from simudator.processor.mia.gui.mia_memory_content_dialog import MiaMemoryContentDialog
class MiaMemoryWindow(QWidget):
diff --git a/src/simudator/gui/module_graphics_item/mia/mia_micro_memory_graphic.py b/src/simudator/processor/mia/gui/mia_micro_memory_graphic.py
similarity index 94%
rename from src/simudator/gui/module_graphics_item/mia/mia_micro_memory_graphic.py
rename to src/simudator/processor/mia/gui/mia_micro_memory_graphic.py
index d0b4402..f23c01b 100644
--- a/src/simudator/gui/module_graphics_item/mia/mia_micro_memory_graphic.py
+++ b/src/simudator/processor/mia/gui/mia_micro_memory_graphic.py
@@ -1,11 +1,9 @@
from qtpy.QtWidgets import QGraphicsRectItem, QGraphicsSimpleTextItem
-from simudator.gui.module_graphics_item.mia.mia_memory_graphic import (
- MiaMemoryGraphicsItem,
-)
from simudator.gui.orientation import Orientation
from simudator.gui.port_graphics_item import PortGraphicsItem
-from simudator.processor.mia.micro_memory import MicroMemory
+from simudator.processor.mia.gui.mia_memory_graphic import MiaMemoryGraphicsItem
+from simudator.processor.mia.modules.micro_memory import MicroMemory
class MicroMemoryGraphicsItem(MiaMemoryGraphicsItem):
diff --git a/src/simudator/gui/module_graphics_item/mia/pc_graphic.py b/src/simudator/processor/mia/gui/pc_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/pc_graphic.py
rename to src/simudator/processor/mia/gui/pc_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/supc_graphic.py b/src/simudator/processor/mia/gui/supc_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/supc_graphic.py
rename to src/simudator/processor/mia/gui/supc_graphic.py
diff --git a/src/simudator/gui/module_graphics_item/mia/upc_graphic.py b/src/simudator/processor/mia/gui/upc_graphic.py
similarity index 100%
rename from src/simudator/gui/module_graphics_item/mia/upc_graphic.py
rename to src/simudator/processor/mia/gui/upc_graphic.py
diff --git a/src/simudator/processor/mia/mia.py b/src/simudator/processor/mia/mia.py
index b657611..913b2dd 100644
--- a/src/simudator/processor/mia/mia.py
+++ b/src/simudator/processor/mia/mia.py
@@ -5,7 +5,7 @@ from simudator.core.modules import Flag
from simudator.core.modules.register import IntegerRegister
from simudator.core.processor import Processor, Signal
from simudator.gui.gui import GUI
-from simudator.gui.module_graphics_item.mia import (
+from simudator.processor.mia.gui import (
AluGraphicsItem,
ArGraphicsItem,
AsrGraphicsItem,
@@ -20,23 +20,23 @@ from simudator.gui.module_graphics_item.mia import (
SupcGraphicsItem,
uPcGraphicsItem,
)
-from simudator.processor.mia.alu import ALU
-from simudator.processor.mia.ar import AR
-from simudator.processor.mia.asr import ASR
-from simudator.processor.mia.bus import Bus
-from simudator.processor.mia.hr import HR
-from simudator.processor.mia.ir import IR
-from simudator.processor.mia.lc import LC
-from simudator.processor.mia.mia_grx import GRX
-from simudator.processor.mia.mia_memory import MiaMemory
-from simudator.processor.mia.micro_memory import MicroMemory
-from simudator.processor.mia.micro_pc import MicroPC
+from simudator.processor.mia.modules.alu import ALU
+from simudator.processor.mia.modules.ar import AR
+from simudator.processor.mia.modules.asr import ASR
+from simudator.processor.mia.modules.bus import Bus
+from simudator.processor.mia.modules.hr import HR
+from simudator.processor.mia.modules.ir import IR
+from simudator.processor.mia.modules.lc import LC
+from simudator.processor.mia.modules.mia_grx import GRX
+from simudator.processor.mia.modules.mia_memory import MiaMemory
+from simudator.processor.mia.modules.micro_memory import MicroMemory
+from simudator.processor.mia.modules.micro_pc import MicroPC
# Using a bare expect is generally bad code practice,
# howere here we want to load the default layout if
# anything goes wrong with loading the selected one,
# we dont care about what went wrong
-from simudator.processor.mia.pc import PC
+from simudator.processor.mia.modules.pc import PC
class MIA_CPU(Processor):
diff --git a/src/simudator/processor/mia/modules/__init__.py b/src/simudator/processor/mia/modules/__init__.py
new file mode 100644
index 0000000..e69de29
diff --git a/src/simudator/processor/mia/alu.py b/src/simudator/processor/mia/modules/alu.py
similarity index 100%
rename from src/simudator/processor/mia/alu.py
rename to src/simudator/processor/mia/modules/alu.py
diff --git a/src/simudator/processor/mia/ar.py b/src/simudator/processor/mia/modules/ar.py
similarity index 95%
rename from src/simudator/processor/mia/ar.py
rename to src/simudator/processor/mia/modules/ar.py
index ee65108..19eca43 100644
--- a/src/simudator/processor/mia/ar.py
+++ b/src/simudator/processor/mia/modules/ar.py
@@ -1,6 +1,6 @@
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class AR(IntegerRegister, MiaBusConnector):
diff --git a/src/simudator/processor/mia/asr.py b/src/simudator/processor/mia/modules/asr.py
similarity index 94%
rename from src/simudator/processor/mia/asr.py
rename to src/simudator/processor/mia/modules/asr.py
index 4bc5de3..3b5a53e 100644
--- a/src/simudator/processor/mia/asr.py
+++ b/src/simudator/processor/mia/modules/asr.py
@@ -1,6 +1,6 @@
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class ASR(IntegerRegister, MiaBusConnector):
diff --git a/src/simudator/processor/mia/bus.py b/src/simudator/processor/mia/modules/bus.py
similarity index 100%
rename from src/simudator/processor/mia/bus.py
rename to src/simudator/processor/mia/modules/bus.py
diff --git a/src/simudator/processor/mia/hr.py b/src/simudator/processor/mia/modules/hr.py
similarity index 96%
rename from src/simudator/processor/mia/hr.py
rename to src/simudator/processor/mia/modules/hr.py
index a817c87..2a2d869 100644
--- a/src/simudator/processor/mia/hr.py
+++ b/src/simudator/processor/mia/modules/hr.py
@@ -1,6 +1,6 @@
from simudator.core.modules.register import IntegerRegister
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class HR(IntegerRegister, MiaBusConnector):
diff --git a/src/simudator/processor/mia/ir.py b/src/simudator/processor/mia/modules/ir.py
similarity index 98%
rename from src/simudator/processor/mia/ir.py
rename to src/simudator/processor/mia/modules/ir.py
index 0e4a563..6d0e4ca 100644
--- a/src/simudator/processor/mia/ir.py
+++ b/src/simudator/processor/mia/modules/ir.py
@@ -2,7 +2,7 @@ from typing import Any
from simudator.core.module import Module
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class IR(Module, MiaBusConnector):
diff --git a/src/simudator/processor/mia/lc.py b/src/simudator/processor/mia/modules/lc.py
similarity index 100%
rename from src/simudator/processor/mia/lc.py
rename to src/simudator/processor/mia/modules/lc.py
diff --git a/src/simudator/processor/mia/mia_bus_connect.py b/src/simudator/processor/mia/modules/mia_bus_connect.py
similarity index 100%
rename from src/simudator/processor/mia/mia_bus_connect.py
rename to src/simudator/processor/mia/modules/mia_bus_connect.py
diff --git a/src/simudator/processor/mia/mia_grx.py b/src/simudator/processor/mia/modules/mia_grx.py
similarity index 98%
rename from src/simudator/processor/mia/mia_grx.py
rename to src/simudator/processor/mia/modules/mia_grx.py
index 75379bb..1c5a33e 100644
--- a/src/simudator/processor/mia/mia_grx.py
+++ b/src/simudator/processor/mia/modules/mia_grx.py
@@ -4,7 +4,7 @@ from typing import Any
from simudator.core.module import Module
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class GRX(Module, MiaBusConnector):
diff --git a/src/simudator/processor/mia/mia_memory.py b/src/simudator/processor/mia/modules/mia_memory.py
similarity index 97%
rename from src/simudator/processor/mia/mia_memory.py
rename to src/simudator/processor/mia/modules/mia_memory.py
index cfac7f1..f3d0f60 100644
--- a/src/simudator/processor/mia/mia_memory.py
+++ b/src/simudator/processor/mia/modules/mia_memory.py
@@ -1,6 +1,6 @@
from simudator.core.modules.memory import Memory
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class MiaMemory(MiaBusConnector, Memory):
diff --git a/src/simudator/processor/mia/micro_memory.py b/src/simudator/processor/mia/modules/micro_memory.py
similarity index 100%
rename from src/simudator/processor/mia/micro_memory.py
rename to src/simudator/processor/mia/modules/micro_memory.py
diff --git a/src/simudator/processor/mia/micro_pc.py b/src/simudator/processor/mia/modules/micro_pc.py
similarity index 100%
rename from src/simudator/processor/mia/micro_pc.py
rename to src/simudator/processor/mia/modules/micro_pc.py
diff --git a/src/simudator/processor/mia/pc.py b/src/simudator/processor/mia/modules/pc.py
similarity index 98%
rename from src/simudator/processor/mia/pc.py
rename to src/simudator/processor/mia/modules/pc.py
index 39100e2..f5fd965 100644
--- a/src/simudator/processor/mia/pc.py
+++ b/src/simudator/processor/mia/modules/pc.py
@@ -4,7 +4,7 @@ from typing import Any
from simudator.core.module import Module
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_bus_connect import MiaBusConnector
+from simudator.processor.mia.modules.mia_bus_connect import MiaBusConnector
class PC(Module, MiaBusConnector):
diff --git a/test/test_mia/test_alu.py b/test/test_mia/test_alu.py
index b053502..09ebf64 100644
--- a/test/test_mia/test_alu.py
+++ b/test/test_mia/test_alu.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.alu import ALU
+from simudator.processor.mia.modules.alu import ALU
cpu = Processor()
input_signal_a = Signal(cpu)
diff --git a/test/test_mia/test_bus.py b/test/test_mia/test_bus.py
index 0f8257c..026b23d 100644
--- a/test/test_mia/test_bus.py
+++ b/test/test_mia/test_bus.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.bus import Bus
+from simudator.processor.mia.modules.bus import Bus
def test_bus():
@@ -20,8 +20,8 @@ def test_bus():
# Test that nothing changes when there is no input to the bus
cpu.do_tick()
- assert out_s_1.get_value() == None
- assert out_s_2.get_value() == None
+ assert out_s_1.get_value() is None
+ assert out_s_2.get_value() is None
# Test that all output signals are given the input value
# when there is input to the bus
diff --git a/test/test_mia/test_ir.py b/test/test_mia/test_ir.py
index cb06b0d..113a19c 100644
--- a/test/test_mia/test_ir.py
+++ b/test/test_mia/test_ir.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.ir import IR
+from simudator.processor.mia.modules.ir import IR
def test_ir():
diff --git a/test/test_mia/test_lc.py b/test/test_mia/test_lc.py
index 53da2e8..aaa591c 100644
--- a/test/test_mia/test_lc.py
+++ b/test/test_mia/test_lc.py
@@ -1,7 +1,7 @@
from simudator.core.modules import Flag
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.lc import LC
+from simudator.processor.mia.modules.lc import LC
def test_default_name():
diff --git a/test/test_mia/test_mia_grx.py b/test/test_mia/test_mia_grx.py
index 89e8036..7740e2a 100644
--- a/test/test_mia/test_mia_grx.py
+++ b/test/test_mia/test_mia_grx.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_grx import GRX
+from simudator.processor.mia.modules.mia_grx import GRX
def test_default_name():
diff --git a/test/test_mia/test_mia_memory.py b/test/test_mia/test_mia_memory.py
index e9db642..99e0227 100644
--- a/test/test_mia/test_mia_memory.py
+++ b/test/test_mia/test_mia_memory.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.mia_memory import MiaMemory
+from simudator.processor.mia.modules.mia_memory import MiaMemory
def test_read():
diff --git a/test/test_mia/test_mia_register.py b/test/test_mia/test_mia_register.py
index d796dcc..206af5a 100644
--- a/test/test_mia/test_mia_register.py
+++ b/test/test_mia/test_mia_register.py
@@ -1,8 +1,8 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.ar import AR
-from simudator.processor.mia.asr import ASR
-from simudator.processor.mia.hr import HR
+from simudator.processor.mia.modules.ar import AR
+from simudator.processor.mia.modules.asr import ASR
+from simudator.processor.mia.modules.hr import HR
def test_asr():
diff --git a/test/test_mia/test_micro_memory.py b/test/test_mia/test_micro_memory.py
index 971b97d..efa544c 100644
--- a/test/test_mia/test_micro_memory.py
+++ b/test/test_mia/test_micro_memory.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.micro_memory import MicroMemory
+from simudator.processor.mia.modules.micro_memory import MicroMemory
def test_alu_field():
diff --git a/test/test_mia/test_micro_pc.py b/test/test_mia/test_micro_pc.py
index 28032cd..1772b55 100644
--- a/test/test_mia/test_micro_pc.py
+++ b/test/test_mia/test_micro_pc.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.micro_pc import MicroPC
+from simudator.processor.mia.modules.micro_pc import MicroPC
def test_upc():
diff --git a/test/test_mia/test_pc.py b/test/test_mia/test_pc.py
index 5e672ec..48d216c 100644
--- a/test/test_mia/test_pc.py
+++ b/test/test_mia/test_pc.py
@@ -1,6 +1,6 @@
from simudator.core.processor import Processor
from simudator.core.signal import Signal
-from simudator.processor.mia.pc import PC
+from simudator.processor.mia.modules.pc import PC
def test_default_name():
--
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