diff --git a/b_asic/signal_flow_graph.py b/b_asic/signal_flow_graph.py
index e9e47845955c118aaecd843c8cfb2f799850ba05..7bcb273ea369611eec98e3568c59b8f18efb7518 100644
--- a/b_asic/signal_flow_graph.py
+++ b/b_asic/signal_flow_graph.py
@@ -1393,7 +1393,7 @@ class SFG(AbstractOperation):
         self,
         show_id: bool = False,
         engine: Optional[str] = None,
-        branch_node: bool = False,
+        branch_node: bool = True,
         port_numbering: bool = True,
         splines: str = "spline",
     ) -> Digraph:
@@ -1409,7 +1409,7 @@ class SFG(AbstractOperation):
         engine : string, optional
             Graphviz layout engine to be used, see https://graphviz.org/documentation/.
             Most common are "dot" and "neato". Default is None leading to dot.
-        branch_node : bool, default: False
+        branch_node : bool, default: True
             Add a branch node in case the fan-out of a signal is two or more.
         port_numbering : bool, default: True
             Show the port number in case the number of ports (input or output) is two or
@@ -1503,7 +1503,7 @@ class SFG(AbstractOperation):
         fmt: Optional[str] = None,
         show_id: bool = False,
         engine: Optional[str] = None,
-        branch_node: bool = False,
+        branch_node: bool = True,
         port_numbering: bool = True,
         splines: str = "spline",
     ) -> None:
@@ -1522,7 +1522,7 @@ class SFG(AbstractOperation):
         engine : string, optional
             Graphviz layout engine to be used, see https://graphviz.org/documentation/.
             Most common are "dot" and "neato". Default is None leading to dot.
-        branch_node : bool, default: False
+        branch_node : bool, default: True
             Add a branch node in case the fan-out of a signal is two or more.
         port_numbering : bool, default: True
             Show the port number in case the number of ports (input or output) is two or
diff --git a/examples/folding_example_with_architecture.py b/examples/folding_example_with_architecture.py
index 8eea8e4d3bf8b47a10f02a60d9161df620232d49..5d531dd85a04c386cdabc03f170c7f60d581733a 100644
--- a/examples/folding_example_with_architecture.py
+++ b/examples/folding_example_with_architecture.py
@@ -120,11 +120,12 @@ arch = Architecture({p1, p2, p_in, p_out}, memories, direct_interconnects=direct
 #        cmul [label="{{<in0> in0}|cmul|{<out0> out0}}"]
 #        memory1:out0 -> adder:in1 [label=2]
 #        cmul:out0 -> adder:in0 [label=2]
-#        memory0:out0 -> cmul:in0 [label=4]
+#        memory0:out0 -> cmul:in0 [label=3]
 #        adder:out0 -> output:in0 [label=1]
 #        input:out0 -> adder:in0 [label=1]
 #        adder:out0 -> memory0:in0 [label=1]
 #        adder:out0 -> adder:in1 [label=2]
 #        memory0:out0 -> adder:in0 [label=1]
+#        adder:out0 -> cmul:in0 [label=1]
 #        cmul:out0 -> memory1:in0 [label=2]
 #    }
diff --git a/examples/schedulingexample.py b/examples/schedulingexample.py
index 44e3f9468a1b8440bb2d4704ff6a267b2a62fa52..e0e82b5698bad5253a50fb82afbddf1ab137883a 100644
--- a/examples/schedulingexample.py
+++ b/examples/schedulingexample.py
@@ -29,5 +29,5 @@ node4 << node3
 
 sfg = SFG([node1], [out], name="Scheduling example")
 # %%
-# THe SFG looks like
+# The SFG looks like
 sfg
diff --git a/examples/secondorderdirectformiir.py b/examples/secondorderdirectformiir.py
index e78a48f32e25b53cfa18f301de2aa2873379b1f1..b4eee8255a65c8ad0b5ff8e268e1fa186863c4f3 100644
--- a/examples/secondorderdirectformiir.py
+++ b/examples/secondorderdirectformiir.py
@@ -29,6 +29,10 @@ out1 = Output(add4, "OUT1")
 
 sfg = SFG(inputs=[in1], outputs=[out1], name="Second-order direct form IIR filter")
 
+# %%
+# The SFG looks like
+sfg
+
 # %%
 # Set latencies and execution times
 sfg.set_latency_of_type(ConstantMultiplication.type_name(), 2)
diff --git a/test/test_sfg.py b/test/test_sfg.py
index 5cc0d4165260852f832d832e8105be74c07aeed9..f6a42e7aaa39014b7dd2cb155c989ca11eafc572 100644
--- a/test/test_sfg.py
+++ b/test/test_sfg.py
@@ -1250,7 +1250,10 @@ class TestSFGGraph:
             ' [shape=ellipse]\n\tcmul1 -> add1 [headlabel=1]\n\tcmul1'
             ' [shape=ellipse]\n\tadd1 -> t1\n\tt1 [shape=square]\n\tt1 -> cmul1\n}'
         )
-        assert sfg_simple_filter.sfg_digraph().source in (res, res + "\n")
+        assert sfg_simple_filter.sfg_digraph(branch_node=False).source in (
+            res,
+            res + "\n",
+        )
 
     def test_sfg_show_id(self, sfg_simple_filter):
         res = (
@@ -1261,7 +1264,9 @@ class TestSFGGraph:
             ' [shape=square]\n\tt1 -> cmul1 [label=s5]\n}'
         )
 
-        assert sfg_simple_filter.sfg_digraph(show_id=True).source in (
+        assert sfg_simple_filter.sfg_digraph(
+            show_id=True, branch_node=False
+        ).source in (
             res,
             res + "\n",
         )
@@ -1276,7 +1281,7 @@ class TestSFGGraph:
             ' cmul1\n}'
         )
 
-        assert sfg_simple_filter.sfg_digraph(branch_node=True).source in (
+        assert sfg_simple_filter.sfg_digraph().source in (
             res,
             res + "\n",
         )
@@ -1289,7 +1294,9 @@ class TestSFGGraph:
             ' -> cmul1\n}'
         )
 
-        assert sfg_simple_filter.sfg_digraph(port_numbering=False).source in (
+        assert sfg_simple_filter.sfg_digraph(
+            port_numbering=False, branch_node=False
+        ).source in (
             res,
             res + "\n",
         )